The prior art thin-film insulated-gate field-effect transistor used in an active-matrix liquid-crystal electro-optical device is constructed as shown in FIG. 2. A blocking layer 208 is formed on an insulating substrate 209. A semiconductor layer having a source 204, a drain 205, and a channel region 203 is formed on the blocking layer 208. A gate-insulating film 202 and a gate electrode 201 are laminated on the semiconductor layer. An interlayer insulating film 211 is formed on the gate-insulating film 202 and on the gate electrode 201. A source electrode 206 and a drain electrode 207 are formed on the interlayer insulating film 211 and on the semiconductor layer.
This prior art insulated-gate FET is manufactured in the sequence described now. First, the blocking layer 208 is formed on the glass substrate 209 by sputtering while using SiO.sub.2 as a target. Then, the semiconductor layer is formed by plasma-assisted CVD and patterned to form the semiconductor layer which will have the source, drain, and channel region. Then, silicon oxide is sputtered to form the gate-insulating film 202. Subsequently, an electrically conductive layer which is heavily doped with phosphorus and used to form the gate electrode is formed by low-pressure CVD. The conductive layer is then patterned to form the gate electrode 201. Thereafter, dopant ions are implanted while using the gate electrode as a mask, so that the source 205 and the drain 204 are fabricated. Then, the laminate is thermally treated to activate it.
In the insulated-gate FET fabricated in this way, the length of the gate electrode 201 taken in the longitudinal direction of the channel is substantially identical with the channel length, indicated by 210. In the case of the n-channel structure, the current-voltage characteristic of the FET of this structure is shown in FIG. 3. This FET has the disadvantage that in the reverse bias region 250, the leakage current increases with increasing the voltage applied between the source and drain. Where this device is used in an active-matrix liquid-crystal electro-optical device, if the leakage current increases in this way, the electric charge stored in a liquid crystal 302 by a writing current 300 is discharged as a leakage current 301 through the leaking portion of the device during the non-writing period, as shown in FIG. 5(A). In this manner, it has been impossible to obtain good contrast.
A conventional method of solving this problem is to add a capacitor 303 for holding electric charge, as shown in FIG. 5(B). However, in order to form such capacitors, capacitive electrodes made of metal interconnects are needed. This results in a decrease in the aperture ratio. Also, it is reported that the aperture ratio is improved by fabricating the capacitors from transparent electrodes of ITO. Nonetheless, this scheme necessitates an excess process and hence has not enjoyed popularity.
Where only one of the source and drain of this insulated-gate FET is connected with a capacitive device or a capacitor and this transistor is used as a switching device, e.g., in the case of a well-known dynamic random access memory (DRAM) of the i transistor/cell type or in the case of an active liquid crystal display having pixels each of which has the circuit shown in FIG. 5(A) or 5(B), it is known that the voltage at the capacitor device is varied by the existence of a parasitic capacitance between the gate electrode and the drain or source.
The variation .DELTA.V in this voltage is in proportion to the gate voltage V.sub.G and to the parasitic capacitance and is in inverse proportion to the sum of the capacitance of the capacitive device and the parasitic capacitance. Therefore, it is customary to fabricate the transistor by the self-aligning technology to reduce the parasitic capacitance, thus suppressing variations in the voltage. However, as the dimensions of devices decrease, the contribution of the parasitic capacitance becomes so large that it can no longer be neglected even if the self-aligning process is exploited.
In an attempt to reduce the variation .DELTA.V, a new method has been proposed. In particular, as shown in FIG. 5(B), a capacitor other than the proper capacitive device is connected in parallel to increase the apparent capacitance of the capacitive device. As described previously, however, the increase in the area of the capacitor cannot be neglected for DRAMs. The decrease in the numerical aperture cannot be neglected for liquid-crystal displays.
Conventionally, a conductive material in single-layers or multilayers was utilized as a wiring material or an electrode material of a semiconductor device (semiconductor element) of an insulating gate field-effect transistor and a semiconductor integrated circuit utilizing a number of them. By overlaying such wirings with insulating films between them, it was comparatively easy to form the wirings.
In the conventional method, it was a problem that short circuit between an upper wiring and a lower wiring happened many times because insulation between wirings was made by an insulating film of 1 .mu.m thickness at most (In many cases, it was a single-layer.). This short circuit was mainly caused by bubbles, holes (pin holes), dusts and the like made in the insulating film. Conventionally, in a semiconductor integrated circuit formed especially on a silicon single-crystal substrate, an insulating film was formed of a material like phosphosilicate glass, and was half melted at a high-temperature of approximately 1000.degree. C. Thus insulating property between wirings was improved by making the bubbles or pin holes disappeared. This process can also make smoother the unevenness generated on the substrate by each process of forming a thin film. It was prominently effective especially to prevent disconnection of metal wires formed on the insulating film.
However, this method is not applicable to every kind of semiconductor devices and integrated circuits. It is quite natural that this method is not applicable to semiconductor devices and integrated circuits utilizing a material which is not proof against such a high temperature. For example, this method is not applicable to a cheap glass substrate of which distortion point is usually 750.degree. C. or less. A material like aluminum to decrease resistance as a wiring could not be utilized, either.
Generally, a higher process temperature needed better heat resistance for the device in the process. This made equipment investment huge. The bigger an object like a substrate to be treated became, the more the amount of investment became exponentially. For example, when a thin film transistor (TFT) is produced to use it as a big liquid crystal display, the size of the substrate should be 300 mm.times.300 mm or bigger, and it was actually impossible to adopt a high temperature process as high as 1000.degree. C.
The present invention was made to solve above problems, and is aimed at obtaining bigger effects by a totally creative method which has never been thought of before.